DCP3TAPR Project Status
Project File: | DCP3TAPR.ise | Current State: | New
Module Name: | dcp3 | Errors: |
Target Device: | xc3s500e-4vq100 | Warnings: |
Product Version: | ISE 10.1.03 - WebPACK | Routing Results: |
Design Goal: | Balanced | Timing Constraints: |
Design Strategy: | Xilinx Default (unlocked) | Final Timing Score: |

DCP3TAPR Partition Summary | [-]
No partition information was found.

Detailed Reports | [-]
Report Name | Status | Generated | Errors | Warnings | Infos
Synthesis Report |  |  |  |  |
Translation Report |  |  |  |  |
Map Report |  |  |  |  |
Place and Route Report |  |  |  |  |
Static Timing Report |  |  |  |  |
Bitgen Report |  |  |  |  |

Date Generated: 07/10/2010 - 09:00:40